Characterization of Diamond Surface-Channel Metal-Semiconductor Field-Effect Transistor with Device Simulation.

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  • Tsugawa Kazuo
    Core Research for Evolutional Science and Technology (CREST), Japan Science and Technology Corporation (JST), c/o Department of Electronics, Information and Communication Engineering, School of Science and Engineering, Waseda University, 3-4-1 Ohkubo, Shinjyuku-ku, Tokyo 169-8555, Japan
  • Umezawa Hitoshi
    Core Research for Evolutional Science and Technology (CREST), Japan Science and Technology Corporation (JST), c/o Department of Electronics, Information and Communication Engineering, School of Science and Engineering, Waseda University, 3-4-1 Ohkubo, Shinjyuku-ku, Tokyo 169-8555, Japan
  • Kawarada Hiroshi
    Core Research for Evolutional Science and Technology (CREST), Japan Science and Technology Corporation (JST), c/o Department of Electronics, Information and Communication Engineering, School of Science and Engineering, Waseda University, 3-4-1 Ohkubo, Shinjyuku-ku, Tokyo 169-8555, Japan

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The DC operation of surface-channel metal-semiconductor field-effect transistors (MESFETs) using p-type conductive layers on hydrogen-terminated diamond surfaces is investigated by two-dimensional device simulation. As a result, a model to describe the surface semiconducting layer, in which acceptors are distributed two-dimensionally on the surface, is found to reproduce actual device characteristics well. Based on the model, the carrier (hole) concentration at a depth of 10 nm is determined to be three orders less than that at the surface. This thin channel realizes complete channel pinch-off and drain-current saturation with high transconductance, observed in the actual diamond surface-channel MESFETs. In the simulation, the transconductance of diamond surface-channel MESFETs with a self-aligned 1 μm gate exceeds 100 mS/mm. This result agrees well with a recent experimental result. The transconductance over 100 mS/mm can compete with that of Si metal-oxide-semiconductor field-effect transistors (MOSFETs) of the same gate length. The hydrogen-terminated diaomond surface is naturally equipped with the silicon-on-insulator-like (SOI-like) thin channel and shallow junction depth required for a nanoscale FET, such as one with a gate length of less than 50 nm.

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