A High Performance FPGA Implementation of 256-bit Elliptic Curve Cryptography Processor Over GF(<i>p</i>)
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- FENG Xiang
- Institute of Microelectronics, Tsinghua University
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- LI Shuguo
- Institute of Microelectronics, Tsinghua University
説明
Field Programmable Gate Array (FPGA) implementation of Elliptic Curve Cryptography (ECC) over GF(p) is commonly not fast enough to meet the request of high-performance applications. There are three critical factors to determine the performance of ECC processor over GF(p): multiplication structure, modular multiplication algorithm, and scalar point multiplication scheduling. This work proposes a novel multiplication structure which is a two-stage pipeline on the basis of Karatsuba-Ofman algorithm. With the proposed multiplication structure, we design a 256-bit modular multiplier based on Improved Barret Modular Multiplication algorithm. Upon the modular multiplier, we finish the scalar point multiplication scheduling and implement a high-performance ECC processor on FPGA. Compared with the previous modular multipliers, our modular multiplier reduces the 256-bit modular multiplication time by 28% at least. Synthesis result on Altera Stratix II shows that our ECC processor can complete a 256-bit ECC scalar point multiplication in 0.51ms, which is at least 1.3 times faster than the currently reported FPGA ECC processors over GF(p).
収録刊行物
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- IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E98.A (3), 863-869, 2015
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詳細情報 詳細情報について
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- CRID
- 1390282681287965184
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- NII論文ID
- 130004770982
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- ISSN
- 17451337
- 09168508
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- 本文言語コード
- en
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- データソース種別
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- JaLC
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