Heteroepitaxy of lattice-matched III‐V‐N/Si and its applications

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  • WAKAHARA Akihiro
    Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology
  • YAMANE Keisuke
    Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology

Bibliographic Information

Other Title
  • Si基板に格子整合したIII‐V‐N混晶の成長とデバイス応用
  • Si基板に格子整合したⅢ-V-N混晶の成長とデバイス応用
  • Si キバン ニ コウシ セイゴウ シタ Ⅲ-V-Nコンショウ ノ セイチョウ ト デバイス オウヨウ

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Abstract

<p>This paper presents key technologies for III‐V/Si heteroepitaxy and its device applications, including the control of a hetero-valent interface, growth of lattice-matched III‐V‐N alloys and doping control of the alloys. Two-dimensional growth of the GaP layer at the initial growth stage on a Si substrate has an important role to suppress the generation of structural defects such as anti-phase domains, stacking faults and melt-back etching. For the successful growth of III‐V‐N alloys, the impact of temperature, nitrogen-composition and the V/III ratio on the crystallinity should be taken into account. The additional understanding of III‐V/Si hetero-epitaxy obtained from our study will be informative for its various applications based on III‐V materials integration with Si.</p>

Journal

  • Oyo Buturi

    Oyo Buturi 87 (7), 494-500, 2018-07-10

    The Japan Society of Applied Physics

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