Impact of 3D structured transistors

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  • ENDOH Tetsuo
    Research Institute of Electrical Communication, Tohoku University

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Other Title
  • トランジスタ構造の立体化
  • 最近の展望 トランジスタ構造の立体化--縦型MOSトランジスタの高密度メモリーへの可能性
  • サイキン ノ テンボウ トランジスタ コウゾウ ノ リッタイカ タテガタ MOS トランジスタ ノ コウミツド メモリー エ ノ カノウセイ
  • −Ultra high density memory with 3D structured MOS devices−
  • −縦型MOSトランジスタの高密度メモリーへの可能性−

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Description

<p>In this paper, the author discusses the breakthrough technology for realizing post-DRAM (Dynamic Random Access Memory) from a viewpoint of vertically structured MOS device technology. In recent years, a comparatively conservative device structure has been chosen for use in semiconductor technology. Therefore, planar-type MOSFETs have been chosen as the transistor for the 65 nm generation. However, in efforts to secure a good performance of future plana-type MOSFETs, many problems have occurred. On the other hand, the DRAM capacitor has changed from a planar-type capacitor to a 3D-type capacitor. In this way, the DRAM overcomes its limitations. Hence, I believe that future ULSIs will maintain a high rate of growth by shifting to 3D-type devices, such as the novel vertically structured device.</p>

Journal

  • Oyo Buturi

    Oyo Buturi 75 (9), 1115-1119, 2006-09-10

    The Japan Society of Applied Physics

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