Alignment techniques and circuit applications of nanowires

DOI Web Site 35 References
  • WAHO Takao
    Faculty of Science and Technology, Sophia University

Bibliographic Information

Other Title
  • ナノワイヤの堆積プロセスと回路応用
  • ナノワイヤ ノ タイセキ プロセス ト カイロ オウヨウ

Search this article

Abstract

<p>To overcome performance limitations due to difficulties in the scaling-down of semiconductor devices, novel approaches, such as involving new materials and structures, have been attracting increasing attention. This article first describes a process technique based on dielectrophoresis. This is successfully applied to InAs nanowire alignment onto a host semiconductor substrate. Simple circuit applications, such as an inverter and a track-and-hold circuit, as well as a MISFET, are then presented.</p>

Journal

  • Oyo Buturi

    Oyo Buturi 81 (12), 1015-1019, 2012-12-10

    The Japan Society of Applied Physics

References(35)*help

See more

Related Projects

See more

Keywords

Details 詳細情報について

Report a problem

Back to top