オーディオアプリケーションに用いる低消費電力アナログデジタル変換回路の提案
書誌事項
- タイトル別名
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- LOW POWER ANALOG-TO-DIGITAL CONVERSION CIRCUIT FOR AUDIO APPLICATION
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説明
In recent years, demand for a mixed signal LSI used for electronic equipment is increasing. High precision and low power consumption are required for ADCs for audio applications. ΔΣ ADC is a method to realize highly accurate AD conversion. However, power efficiency is poor as compared with general ADC configuration. This paper proposes a two steps ADC using a SAR-ADC and ΔΣ-ADC. The SAR-ADC arranged in the preceding stage can relax the required performance of the analog circuit of ΔΣ ADC. Therefore, low power consumption can be achieved. This proposal is designed with 0.18um CMOS. The performance of proposed system is confirmed by system simulation using MATLAB / Simulink and circuit simulation using Virtuoso / spectre, respectively.
収録刊行物
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- 法政大学大学院紀要. 理工学・工学研究科編
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法政大学大学院紀要. 理工学・工学研究科編 59 1-7, 2018-03-31
法政大学大学院理工学研究科
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詳細情報 詳細情報について
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- CRID
- 1390572174778225536
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- NII論文ID
- 120006587711
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- NII書誌ID
- AA12677220
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- HANDLE
- 10114/00021579
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- ISSN
- 21879923
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- 本文言語コード
- ja
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- 資料種別
- departmental bulletin paper
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- データソース種別
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- JaLC
- IRDB
- CiNii Articles
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- 抄録ライセンスフラグ
- 使用可