SILL: Preventing structural attack for logic locking

DOI Web Site 被引用文献2件 参考文献27件
  • Liang Jihu
    College of Information Science & Electronic Engineering, Zhejiang University
  • Wang Ke
    Department of Electrical Engineering, Zhejiang University
  • Xi Wei
    Digital Grid Research Institute, China Southern Power Grid
  • Xu Changbao
    Electric Power Research Institute of Guizhou Power Grid Co., Ltd.
  • Chen Junjian
    Digital Grid Research Institute, China Southern Power Grid
  • Huang Kai
    School of Micro-Nano Electronics, Zhejiang University

抄録

<p>Logic locking is an integrated circuits (ICs) protection technique that thwarts reverse engineering, IC overproduction, and IP piracy caused by untrusted foundry and end-users. After Boolean Satisfiability (SAT) solver was applied to crack the keys, researchers proposed various defenses against SAT, approximate, and removal attacks. The Valkyrie attack based on structural analysis has been recently presented that breaks all the existing combinational logic locking techniques. In this letter, we present Structural Interference Logic Locking (SILL) technique. SILL adds interference logic combined with traditional cryptographic logic to drive the primary output, which enables defense against structural attacks by assigning keys to the cryptographic and interference logic according to rules. According to the experimental results, SILL is between (k-4)-secure and (k-2)-secure against SAT Attack while defending against Valkyrie attack.</p>

収録刊行物

  • IEICE Electronics Express

    IEICE Electronics Express 20 (2), 20220512-20220512, 2023-01-25

    一般社団法人 電子情報通信学会

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