Novel Technique to Reduce Capacitor Currents in DC link of PWM Double Inverters with Current Sensors in Series with Low-Side Switches

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  • Mori Tatsuya
    Mitsubishi Electric Corporation Department of Electrical and Electronics Engineering, Kagoshima University
  • Yamamoto Kichiro
    Department of Electrical and Electronics Engineering, Kagoshima University

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  • 下アームシャント電流検出ダブルインバータにおける直流リンク部コンデンサ電流低減スイッチング法
  • シタ アームシャント デンリュウ ケンシュツ ダブルインバータ ニ オケル チョクリュウ リンクブ コンデンサ デンリュウ テイゲン スイッチングホウ

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<p>This paper proposes a technique to reduce capacitor currents in the dc link of PWM double inverters with current sensors in series with low-side switches. In the proposed technique, the phase difference between carrier signals in each inverter of the PWM double inverters is set to 180 degrees, and the voltage references of double inverters are shifted in accordance with the difference between the voltage reference of the medium value and that of the minimum value. The conventional and proposed technique are compared using the experimental results. Compared to the conventional technique, the proposed technique can reduce capacitor currents in the dc link of double inverters, while maintaining the harmonics of the inverter output current.</p>

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