Empirical Power-performance Analysis of Layer-wise CNN Inference on Single Board Computers
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- Ng Kuan Yi
- Kyushu University
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- Babai Aalaa M.A.
- Kyushu University
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- Tanimoto Teruo
- Kyushu University
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- Kawakami Satoshi
- Kyushu University
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- Inoue Koji
- Kyushu University
説明
<p>This paper analyzes the impact of input sparsity and DFS/DVFS configurations for single-board computers on the execution time, power, and energy of each VGG16 layer as the first step towards efficient CNN inference on single-board computers. For this purpose, we first develop a power and execution time measurement environment and perform experiments using Raspberry Pi 4 and NVIDIA Jetson Nano. Our results show that clock frequency strongly correlates with execution time and power. Inversely, input sparsity has a weak correlation with execution time and power. Then, we show that a coarse-grained DVFS model can explain over 96% of the variations in the power of each VGG16 layer even when sets of clock frequency and voltage on the single-board computer are unavailable.</p>
収録刊行物
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- Journal of Information Processing
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Journal of Information Processing 31 (0), 478-494, 2023
一般社団法人 情報処理学会
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詳細情報 詳細情報について
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- CRID
- 1390860078756164736
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- ISSN
- 18826652
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- Crossref
- KAKEN
- OpenAIRE
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- 抄録ライセンスフラグ
- 使用不可