Design and implementation of an LDPC encoder for satellite navigation system

DOI Web Site 24 References
  • Yuan Qing
    Institute of Microelectronics of the Chinese Academy of Sciences University of Chinese Academy of Sciences
  • Liu Haiyang
    Institute of Microelectronics of the Chinese Academy of Sciences
  • Wang Lixin
    Institute of Microelectronics of the Chinese Academy of Sciences
  • Ma Meijuan
    Institute of Microelectronics of the Chinese Academy of Sciences
  • Shi Liqiang
    China Railway Engineering Design and Consulting Group Co., Ltd

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Description

<p>In this work, a low-complexity encoder is designed and implemented for LDPC codes in the GPS-L1C standard. By using the structural properties of parity-check matrices, we propose a backward substitution encoding method based on look-up-tables for calculating parity-check bits, which avoids the storage of the inverse matrices recommended by the GPS-L1C standard. As a result, the storage requirement and the encoding delay are reduced. The implementation results in 65 nm process indicate that the designed encoder circuit area is 5869.44µm2, the number of equivalent gates is 2006, the storage is 600 bits, and the delay is 60 cycles.</p>

Journal

  • IEICE Electronics Express

    IEICE Electronics Express 21 (17), 20240322-20240322, 2024-09-10

    The Institute of Electronics, Information and Communication Engineers

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