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A 9μW 50MHz 32b Adder Using a Self-Adjusted Forward Body Bias in SoCs
Bibliographic Information
- Other Title
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- 9マイクロW 50MHz 32b Adder Using a Self Adjusted Forward Body Bias in SoCs
- VLSI一般(ISSCC'03関連特集)
- VLSI イッパン ISSCC 03 カンレン トクシュウ
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Journal
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- 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
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電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 103 (89), 59-63, 2003-05-29
東京 : 電子情報通信学会
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Keywords
Details 詳細情報について
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- CRID
- 1520009409470961152
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- NII Article ID
- 110003316419
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- NII Book ID
- AN10013276
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- ISSN
- 09135685
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- NDL BIB ID
- 6619994
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- Text Lang
- ja
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- NDL Source Classification
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- ZN33(科学技術--電気工学・電気機械工業--電子工学・電気通信)
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- Data Source
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- NDL Search
- CiNii Articles