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Design of partially-asynchronous parallel processing elements for setting up Benes networks in O(log[2]N) time
Bibliographic Information
- Other Title
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- Design of partially asynchronous parallel processing elements for setting up Benes networks in O log 2 N time
- O(log[2]N)の処理時間を有するベネス網の並列制御回路の設計
- 通信方式
- ツウシン ホウシキ
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Journal
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- 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報
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電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 109 (116), 7-10, 2009-07
東京 : 電子情報通信学会
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Keywords
Details 詳細情報について
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- CRID
- 1520290883089542400
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- NII Article ID
- 110007358818
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- NII Book ID
- AN10013298
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- ISSN
- 09135685
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- NDL BIB ID
- 10308023
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- Text Lang
- en
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- NDL Source Classification
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- ZN33(科学技術--電気工学・電気機械工業--電子工学・電気通信)
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- Data Source
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- NDL Search
- CiNii Articles