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Design of Josephson Ternary Delta-Gate (δGate)
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- Haidar AliMassoud
- Faculty of Engineering, Saitama University
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- Li Fu-Qiang
- Faculty of Engineering, Saitama University
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- Morisue Mititada
- Faculty of Engineering, Saitama University
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Description
A new circuit design of Josephson ternary δ-gate composed of Josephson junction devices is presented. Mathematical theory for synthesizing, analyzing, and realizing any given function in ternary system using Josephson ternary δ-gate is introduced. The Josephson ternary δ-gate is realized using SQUID technique. Circuit simulation results using J-SPICE demonstrated the feasibility and the reliability operations of Josephson ternary δ-gate with very high performances for both speed and power consumption (max. propagation delay time= ps and max. power consumption=2.6 μW). The Josephson ternary δ-gate forms a complete set (completeness) with the ternary constants (-1,0,1). The number of SQUIDs that are needed to perform the operation of δ-gate is 6. Different design with less than 6 SQUIDs is not possible because it can not perform the operation of δ-gate. The advantages of Josephson ternary δ-gate compared with different Josephson logic circuits are as follows: The δ-gate has the property that a simple realization to any given ternary logic function as the building blocks can be achieved. The δ-gate has simple construction with small number of SQUIDs. The δ-gate can realize a large number of ternary functions with small number of input / output pins. The performances of δ-gate is very high, very low power consumption and ultra high speed switching operation.
Journal
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- IEICE transactions on information and systems
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IEICE transactions on information and systems 76 (8), 853-862, 1993-08-25
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1570291227425719552
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- NII Article ID
- 110003209306
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- NII Book ID
- AA10826272
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- ISSN
- 09168532
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- Text Lang
- en
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- Data Source
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- CiNii Articles