高速離散コサイン変換ディジタル回路

Bibliographic Information

Other Title
  • High-Speed Digital Circuit of Discrete Cosine Tranform

Search this article

Description

本報告では,高速な離散コサイン変換(DCT)ディジタル回路を議論する.DCTの部分積和計算の回数を削減し,{-1,0,+1}で表現する桁上げ伝播の生じない冗長2進加算器を利用して最少ゲート段数の回路で合成する新しいアルゴリズムを提案する.そのゲート数は従来のアルゴリズムのわずか半分で,ゲート段数は42.5%に過ぎない.
This paper deals with a high-speed digital circuit of the discrete cosine transform(DCT).We propose a new algorithm that reduces the number of calculations for partial sum-of-products in the DCT,and synthesize the minimum gate depth circuit of DCT by using carry-propagation-free adders based on redundant binary{-1,0, +1}representation.The number of gates is only half of the conventional algorithms and the gate depth is 42.5 % of them.

Journal

  • IEICE technical report. Speech

    IEICE technical report. Speech 94 (215), 39-46, 1994-09-06

    The Institute of Electronics, Information and Communication Engineers

Keywords

Details 詳細情報について

  • CRID
    1570572702386025600
  • NII Article ID
    110003297147
  • NII Book ID
    AN10013221
  • Text Lang
    en
  • Data Source
    • CiNii Articles

Report a problem

Back to top