Design of a 200MHz 1.2W 1.4GFLOPS Processor with Graphic Floating-point Extension

Bibliographic Information

Other Title
  • グラフィック浮動小数点演算を強化した200MHz 1.2W 1.4GFLOPSプロセッサ

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Description

A-2-issue 58mm^2 microprocessor is implemented with 5-metal-layer 0.25μm CMOS process. It dissipates 1.2W at 200MHz. This report describes the low power and high performance design. In order to extend the floating-point performance, a graphic FPU and graphic-oriented instructions are provided. The graphic FPU processes seven single precision floating-point operations by using a two-stage four way inner product (i. e. multiply and accumulate) logic. Its simulated delay is 3.69ns.

Journal

  • Technical report of IEICE. ICD

    Technical report of IEICE. ICD 98 (23), 17-24, 1998-04-24

    The Institute of Electronics, Information and Communication Engineers

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Details 詳細情報について

  • CRID
    1570572702484219008
  • NII Article ID
    110003316986
  • NII Book ID
    AN10013276
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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