C-12-5 65nm-CMOS Output Buffer Circuit with Transmit Pre-emphasis for 25-Gbit/s Operation

Tanaka Tomoki

Dept. Electronic Systems Engineering, The University of Shiga Prefecture
Katsurai Hiroaki

NTT Microsystem Integration Laboratories, Nippon Telegraph and Telephone Corporation
Inoue Hiroshi

Dept. Electronic Systems Engineering, The University of Shiga Prefecture
Kishine Keiji

Dept. Electronic Systems Engineering, The University of Shiga Prefecture
Nogawa Masafumi

NTT Microsystem Integration Laboratories, Nippon Telegraph and Telephone Corporation
Inaba Hiromi

Dept. Electronic Systems Engineering, The University of Shiga Prefecture

Bibliographic Information

Other Title

Proceedings of the IEICE General Conference

Proceedings of the IEICE General Conference 2014 (2), 69-, 2014-03-04

The Institute of Electronics, Information and Communication Engineers

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