Low temperature divided CVD technique for TiN metal gate electrodes of p-MISFETs

  • SAKASHITA Shinsuke
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • MORI Kenichi
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • TANAKA Kazuki
    Process Engineering Section, Wafer Process Engineering Dept., Renesas Semiconductor Engineering Corporation
  • MIZUTANI Masaharu
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • INOUE Masao
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • YAMANARI Shinichi
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • YUGAMI Jiro
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • MIYATAKE Hiroshi
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation
  • YONEDA Masahiro
    Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation

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詳細情報 詳細情報について

  • CRID
    1570854175649129472
  • NII論文ID
    10022543427
  • NII書誌ID
    AA10777858
  • 本文言語コード
    en
  • データソース種別
    • CiNii Articles

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