A Method for Diagnosing Multiple Stuck-at Faults in Combinational Circuits using Single and Multiple Fault Simulations

Bibliographic Information

Other Title
  • 単一/多重故障シミュレーションに基づく組合せ回路の多重縮退故障に対する一診断法

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Description

In this paper, we propose a new method that uses single and multiple fault simulations to diagnose multiple stuck-at faults in combinational circuits. On the assumption that all suspected faults are equally likely in the faulty circuit, multiple fault simulations are performed. Depending on whether or not multiple fault simulation results in primary output values that agree with the observed values, faults are added to or removed from a set of suspected faults. Diagnosis is effected by repeated additions and removals of faults. The effectiveness of the method of diagnosis has been evaluated by experiments conducted on benchmark circuits. The proposed method achieves a small number of suspected faults by simple processing.

Journal

  • IPSJ SIG Notes

    IPSJ SIG Notes 99 (12), 73-80, 1999-02-04

    Information Processing Society of Japan (IPSJ)

Keywords

Details 詳細情報について

  • CRID
    1570854177222547328
  • NII Article ID
    110002930602
  • NII Book ID
    AN1011091X
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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