A New Architecture of Multi-Purpose Microprocessor : Bus Instruction Set Computer(BISC)
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- YAMASHITA Yukihiko
- Department of International Development Engineering Faculty of Engineering Tokyo Institute of Technology
Bibliographic Information
- Other Title
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- BISC型多目的プロセッサ
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Description
In this paper, we propose a new architecture of a microprocessor called BISC(Bus Instruction Set Computer). This type of processor has only instructions for the transfer of data in registers by an internal bus. For example, it does not have Load or Store command. Therefore, since it's decoding of instructions is very simple, it does not need a pipeline process, and each part of the processor is highly independent to another part, it's structure is very simple. Furthermore, when we add functions to the processor, we dose not need to change the instruction set or the main structure of the processor. Therefore, for image processing, coding, etc., we can construct a processor which is suitable to such many purposes.
Journal
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- IEICE technical report. Computer systems
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IEICE technical report. Computer systems 96 (342), 9-14, 1996-10-31
The Institute of Electronics, Information and Communication Engineers
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Keywords
Details 詳細情報について
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- CRID
- 1570854177446592128
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- NII Article ID
- 110003179972
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- NII Book ID
- AN10013141
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- Text Lang
- ja
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- Data Source
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- CiNii Articles
