Memory Protection and Exception Mechanism for Distributed Shared Memory Parallel Computer Depend on Segmentation of Linear Address Space

  • Tamura Hitoshi
    Division of Electronic and Infomation Engineering,Faculty of Technology,Tokyo University of Agriculture and Technology
  • Tomisawa Masaki
    Division of Electronic and Infomation Engineering,Faculty of Technology,Tokyo University of Agriculture and Technology
  • Atoda Oichi
    Division of Electronic and Infomation Engineering,Faculty of Technology,Tokyo University of Agriculture and Technology

Bibliographic Information

Other Title
  • 分散共有メモリ型並列計算機上のセグメントによるメモリ保護と例外処理機構

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Description

We propose a exception processing model and a memory protection method,that depend on segmentation of a linear address space for the Demand-Accept model parallel computer.This parallel computer has a control mechanism based parallel procedure call,that executes instances of procedures concurrently.We design a multitask system on the parallel computer,by duplicating data structures of the control mechanism.When some exception occurs in execution on the parallel computer,a exception mechanism switch the data structure to other.We also design a memory protection method,depend on segmentation of linear address space to each tasks.We are implimenting the exception mechanism and the memory protection method on intel i486 processors.

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Details 詳細情報について

  • CRID
    1571135652384736256
  • NII Article ID
    110003180417
  • NII Book ID
    AN10013141
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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