Embedded DRAM Technology : DRAM merges to ASIC

6 Citations 3 References

Bibliographic Information

Other Title
  • Embedded DRAM 技術 : DRAMはASICに溶け込む

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Description

An overview of an ASIC process technology logic based embedded DRAM test chip results are reported. This test chip employed 1T1C type cell. 0.5um ASIC process technology is applied. Initial silicon is over 80% yield without changing of process. And this chip has high speed data rate maximum 200MB/S. We confirmed that ASIC module feasibility.

Journal

  • Technical report of IEICE. ICD

    Technical report of IEICE. ICD 97 (57), 19-24, 1997-05-23

    The Institute of Electronics, Information and Communication Engineers

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Keywords

Details 詳細情報について

  • CRID
    1571135652436154752
  • NII Article ID
    110003316546
  • NII Book ID
    AN10013276
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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