Logic Synthesis of Linear Transformation Circuit for Parallel Index Generator
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- MATSUNAGA Yusuke
- Faculty of Information Science and Electorical Engineering, Kyushu University
Bibliographic Information
- Other Title
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- 並列インデックス生成器のための線形変換回路合成手法(システムLSIの応用とその要素技術,専用プロセッサ,プロセッサ,DSP,画像処理技術,及び一般)
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Journal
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- IEICE technical report. Image engineering
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IEICE technical report. Image engineering 114 (233), 1-6, 2014-09-25
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1571135652852645888
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- NII Article ID
- 110009959138
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- NII Book ID
- AN10013006
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- Text Lang
- ja
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- Data Source
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- CiNii Articles