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Asynchronous System based on B-ternary Logic
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- NAGATA Yasunori
- Dept. of Elec'l & Electronics Eng., Univ. of the Ryukyus
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- MUKAIDONO Masao
- Dept. of Compt. Science, Meiji Univ.
Bibliographic Information
- Other Title
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- B-3値論理に基づく非同期ディジタルシステムの設計について
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Description
In this article, the asynchronous digital system based on B-ternary logic is presented. The system processes binary data, in the data, path, though, which consists of ternary gates. B-ternary logic is the logic which satisfies Kleenean algebra that can deal with ambiguity, so that the logic provides simple and straightforward single-rail asynchronous system with the assignment 1/2 to the uncertain data-bits in the asynchronous operations. We designed CMOS type ternary NAND, NOR, NOT gates and Muller's C-element: which has ternary-input binary-output properties. Moreover, request/acknowledge circuits and controller are also designed.
Journal
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- Technical report of IEICE. FTS
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Technical report of IEICE. FTS 97 (224), 39-46, 1997-08-19
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1571417127330665984
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- NII Article ID
- 110003193919
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- NII Book ID
- AN10012998
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- Text Lang
- ja
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- Data Source
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- CiNii Articles