A 0.9V 150MHz 10mW 4mm^2 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme
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- FUJITA Tetsuya
- System ULSI Engineering Lab. Toshiba Corp.
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- KURODA Tadahiro
- System ULSI Engineering Lab. Toshiba Corp.
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- MITA Shinji
- System ULSI Engineering Lab. Toshiba Corp.
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- NAGAMATSU Tetsu
- System ULSI Engineering Lab. Toshiba Corp.
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- YOSHIOKA Shinichi
- System ULSI Engineering Lab. Toshiba Corp.
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- SANO Fumihiko
- System ULSI Engineering Lab. Toshiba Corp.
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- NORISHIMA Masayuki
- System ULSI Engineering Lab. Toshiba Corp.
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- MUROTA Masayuki
- System ULSI Engineering Lab. Toshiba Corp.
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- KAKO Makoto
- System ULSI Engineering Lab. Toshiba Corp.
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- KINUGAWA Masaaki
- System ULSI Engineering Lab. Toshiba Corp.
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- KAKUMU Masakazu
- System ULSI Engineering Lab. Toshiba Corp.
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- SAKURAI Takayasu
- System ULSI Engineering Lab. Toshiba Corp.
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Description
A 4mm-2 2-D discrete cosine transform core processor for HDTV-resolution video compression/decompression in a 0.3μm CMOS triple-well double-metal technology operates at 150MHz from a 0.9V power supply and consumes 10mW. Circuit techniques for dynamically varying threshold voltage are introduced to reduce active power dissipation with negligible overhead in speed, standby power dissipation and chip area.
Journal
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- IEICE technical report. Electron devices
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IEICE technical report. Electron devices 96 (107), 43-48, 1996-06-20
The Institute of Electronics, Information and Communication Engineers
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Keywords
Details 詳細情報について
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- CRID
- 1571417127332905856
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- NII Article ID
- 110003200118
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- NII Book ID
- AN10012954
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- Text Lang
- ja
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- Data Source
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- CiNii Articles
