C-12-8 High Speed Design Method of D-FF Circuit Focused on Transistor Size in Sub-100nm CMOS
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- Hamada Taisuke
- Dept. Electronic Systems EngineeringThe University of Shiga Prefecture
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- Inoue Hiroshi
- Dept. Electronic Systems EngineeringThe University of Shiga Prefecture
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- Kishine Keiji
- Dept. Electronic Systems EngineeringThe University of Shiga Prefecture
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- Tsuchiya Akira
- Dept. Communications and Computer Engineering Kyoto University
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- Kuboki Takeshi
- Dept. Communications and Computer Engineering Kyoto University
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- Inaba Hiromi
- Dept. Electronic Systems EngineeringThe University of Shiga Prefecture
Bibliographic Information
- Other Title
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- C-12-8 トランジスタサイズに着目した微細CMOS D-FF回路の高速化設計手法(C-12.集積回路)
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Journal
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- Proceedings of the IEICE General Conference
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Proceedings of the IEICE General Conference 2013 (2), 79-, 2013-03-05
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1571698602832777600
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- NII Article ID
- 110009767117
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- NII Book ID
- AN10471452
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- Text Lang
- ja
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- Data Source
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- CiNii Articles
