Hyperscalar Processor Architecture : Its Adaptability to Soft-Core Processor

  • Murakami Kazuaki
    Department of Information Systems Interdisciplinary Graduate School of Engineering Sciences Kyushu University

Bibliographic Information

Other Title
  • ハイパースカラ・プロセッサ・アーキテクチャ : Soft-Core Processorとしての適応性

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Description

This paper claims that the hyperscalar processor architecture is a good candidate for a soft-core processor which is a new type of CPU-cores for ASIPs. By means of the current ASIC design methodologies such as top-down approach and hardware/software co-design, the soft-core processors allow the users to re-design and optimize the CPU-cores themselves. This paper suggests that such re-design and optimization should be performed within a appropriate framework. The paper also illustrates an example of such frameworks for hyperscalar processors to be used as soft-core processors. When the users choose hyperscalar processor as soft-core processors, they can optimize the datapaths of CPU-cores to match them with the applications.

Journal

  • IPSJ SIG Notes

    IPSJ SIG Notes 93 (111), 175-182, 1993-12-16

    Information Processing Society of Japan (IPSJ)

Details 詳細情報について

  • CRID
    1571980076992405376
  • NII Article ID
    110002775234
  • NII Book ID
    AN10096105
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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