Maple : A Simultanecous Technology Mapping.Placement.and Global Routing Algorithm for LUT-based FPGAs

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Other Title
  • Maple : LUT-FPGAを対象としたテクノロジーマッピング・配置・概略配線同時処理手法

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Description

Technology mapping algorithms for LUT(Look Up Table)based FPGAs have aimed at transforming a Boolean network into logic-blocks. However.since those algorithms take no layout information into account.they cannot produce excellent layout results.In this paper. a simultaneous technology mapping,placement and global routing algorithm for FPGAs,Maple.is presented.MAple is an extended version of a simultaneous placement,and global routing algorithm for FPGAs,which is based on recursive partition of layout regions and block sets.Maple inherits its basic process and exectes the technology mapping simultaneously in each recursive process. Therefore,the mapping can be done with the placement and global routing information.Experimental results for some benchmark circuits demonstrate its efficiency and effectiveness.

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Details 詳細情報について

  • CRID
    1571980077315400832
  • NII Article ID
    110003180385
  • NII Book ID
    AN10013141
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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