Fabrication of a Si<SUB>1−<I>x</I></SUB>Ge<I><SUB>x</SUB></I> Channel Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) Containing High Ge Fraction Layer by Low-Pressure Chemical Vapor Deposition

  • Goto Kinya
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Murota Junichi
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Maeda Takahiro
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Schütz Reiner
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Aizawa Kiyohito
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Kircher Roland
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Yokoo Kuniyoshi
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University
  • Ono Shoichi
    Laboratory for Microelectronics, Research Institute of Electrical Communication, Tohoku University

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説明

A method for growing the high-quality strained epitaxial heterostructure of Si/Si1−xGex/Si by low-pressure chemical vapor deposition (CVD) and the fabrication of Si1−xGex-channel metal-oxide-semiconductor field-effect transistors (MOSFET's) with a high Ge fraction layer have been investigated. It is found that lowering of the deposition temperature of the Si1−xGex and Si capping layers is necessary with increasing Ge fraction in order to prevent island growth of the layers. With the use of the optimized fabrication process, Si/Si1−xGex/Si heterostructures with flat surfaces and interfaces were realized, and a high-performance Si0.5Ge0.5-channel MOSFET has been achieved with a large mobility enhancement of about 70% at 300 K and over 150% at 77 K compared with that of a MOSFET without a Si1−xGex channel.

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