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Matrix multiplication performance on current PCs
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- MAENO Toshinori
- Computer Center, Tokyo Institute of Technology
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- MURAKAMI Hiroshi
- 東京都立短期大学 経営情報学科
Bibliographic Information
- Other Title
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- パソコンの行列演算性能の評価
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Description
We have measured the time of matrix multiply and BLAS1 routines on three personal computers, and compared the performance. The memory bandwidth is improved much in the last year, however, it is still important to use registers and cache memory effectively to reduce memory access latency. So, the research to improve the compilers for generating fast code for the hierarchical memory systems should be encouraged.
Journal
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- IPSJ SIG Notes
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IPSJ SIG Notes 64 7-12, 1996-12-12
Information Processing Society of Japan (IPSJ)
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Details 詳細情報について
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- CRID
- 1572261552107517568
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- NII Article ID
- 110002932223
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- NII Book ID
- AN10463942
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- Text Lang
- ja
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- Data Source
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- CiNii Articles