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Architecture of a Collision Detection VLSI Processor for Intelligent Vehicles Based on a ROM-Type Content-Addressable Memory
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- HARIYAMA Masanori
- Graduate School of Information Sciences, Tohoku University
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- KAMEYAMA Michitaka
- Graduate School of Information Sciences, Tohoku University
Bibliographic Information
- Other Title
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- 読出し専用型連想メモリに基づく高安全自動車用衝突チェックVLSIプロセッサの構成
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Description
In the collision detection of intelligent Vehicles, high-computational power is essential to check a conflict between a vehicle and an obstacle. For the matching operations, a vehicle representation based on a set of rectangular, solids is used, so that they are performed by only magnitude comparison which is suitable for the processing using a content-addressable memory(CAM). When the vehicle pixel information can be stored in advance, it is not necessary to change the CAM in real time. As a result, a new ROM-type CAM is efficiently employed for the high-speed matching operations.
Journal
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- Technical report of IEICE. DSP
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Technical report of IEICE. DSP 95 (299), 87-94, 1995-10-20
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1572261552345701504
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- NII Article ID
- 110003279835
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- NII Book ID
- AN10060786
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- ISSN
- 09135685
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- Text Lang
- ja
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- Data Source
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- CiNii Articles