A Dynamically Reconfigurable Processor with Multi-Mode Operation Based on Newly Developed Full-Adder/D-Flip-Flop Merged Module (FDMM)

  • SAKAIDANI Satoshi
    Department of Electronic Engineering, Graduate School of Engineering, Tohoku University
  • MIYAMOTO Naoto
    Department of Electronic Engineering, Graduate School of Engineering, Tohoku University
  • OHMI Tadahiro
    New Industry Creation Hatchery Center, Tohoku University

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詳細情報 詳細情報について

  • CRID
    1572543025096404224
  • NII論文ID
    10017198275
  • NII書誌ID
    AA10777858
  • 本文言語コード
    en
  • データソース種別
    • CiNii Articles

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