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- NOJIMA Takashi
- Research and Development Division, Jedat Innovation Inc.
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- ZHU Xiaoke
- Research and Development Division, Jedat Innovation Inc.
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- TAKASHIMA Yasuhiro
- Dept. of Information and Media Sciences, The University of Kitakyushu
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- NAKATAKE Shigetoshi
- Dept. of Information and Media Sciences, The University of Kitakyushu
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- KAJITANI Yoji
- Dept. of Information and Media Sciences, The University of Kitakyushu
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説明
A challenge to an automated layout of analog ICs starts with the insight into high quality placements crafted by experts. We observe first that matched devices or elemental functions such as input, output, amplifiers, etc are clustered. Second, devices in the same cluster are located faithfully to the drawn schema. Third, these two features are simultaneously fulfilled in a well-compacted placement. This paper proposes a novel device-level placement that simulates the above features based on Sequence-Pair. A slight modification of the meaning, say, of relation "A is left-of B" to relation "A is not right-of B" enlarges the freedom and allows a neater compaction of clusters allowing zigzag border curves. As the consequence, clusters are placed faithfully to relative position in the schema. We tested our algorithm for industrial instances and compared results with those by manual design. The results showed better features in performance figures than the those of manual designs by, on average, 13.5% and 21.2% with respect to the area and total net-length.
収録刊行物
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- IEICE transactions on fundamentals of electronics, communications and computer sciences
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IEICE transactions on fundamentals of electronics, communications and computer sciences 87 (12), 3301-3308, 2004-12-01
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詳細情報 詳細情報について
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- CRID
- 1572543027347966336
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- NII論文ID
- 110003212870
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- NII書誌ID
- AA10826239
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- ISSN
- 09168508
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- 本文言語コード
- en
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- データソース種別
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- CiNii Articles