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Design of superconducting 4-bit Full Adder with 3-input XOR gates
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- Takahashi K.
- Superconductivity Research Laboratory, ISTEC Tokyo Denki University(TDU)
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- Nagasawa S.
- Superconductivity Research Laboratory, ISTEC
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- Hasegawa H.
- Superconductivity Research Laboratory, ISTEC
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- Miyahara K.
- Superconductivity Research Laboratory, ISTEC Tokyo Denki University(TDU)
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- Takai H.
- Tokyo Denki University(TDU)
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- Enomoto Y.
- Superconductivity Research Laboratory, ISTEC
Bibliographic Information
- Other Title
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- C-8-5 3入力XOR回路を用いた超電導4ビット全加算器の設計
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Journal
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- Proceedings of the Society Conference of IEICE
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Proceedings of the Society Conference of IEICE 2002 (2), 34-, 2002-08-20
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1572824502265590784
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- NII Article ID
- 110003375742
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- NII Book ID
- AN10489017
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- Text Lang
- ja
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- Data Source
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- CiNii Articles
