TLB Update-Hint : A Scalable TLB Consistency Algorithm for Cache-Coherent Non-uniform Memory Access Multiprocessors
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- SEONG Byeonghag
- Department of Electrical Engineering and Computer Science [Division of Electrical Engineering], Korea Advanced Institute of Science and Technology
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- KIM Donggook
- Department of Electrical Engineering and Computer Science [Division of Electrical Engineering], Korea Advanced Institute of Science and Technology
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- ROH Yangwoo
- Department of Electrical Engineering and Computer Science [Division of Electrical Engineering], Korea Advanced Institute of Science and Technology
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- PARK Kyuho
- Department of Electrical Engineering and Computer Science [Division of Electrical Engineering], Korea Advanced Institute of Science and Technology
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- PARK Daeyeon
- Department of Electrical Engineering and Computer Science [Division of Electrical Engineering], Korea Advanced Institute of Science and Technology
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説明
Shared memory multiprocessors in which each processor has its own TLB must manage consistency among TLBs and a page table. As the large-scale CC-NUMA (cache-coherent non-uniform memory access) shared memory multiprocessors become popular, it is important for TLB consistency management algorithms to be highly scalable. In this paper, we propose a TLB update-hint algorithm as a scalable TLB consistency management solution for CC-NUMA multiprocessors. By using a lazy TLB invalidation approach, we reduced the number of unnecessary processor interruptions and idle-waiting time, and achieved a high level of scalability. Using a shared memory simulator, we evaluated the TLB update-hint algorithm. For performance comparison, we also simulated the TLB shootdown algorithm, one of the most popular TLB consistency algorithms. The simulations demonstrated that the TLB update-hint algorithm scales well in systems with a large number of processors. At 64 node systems, the TLB update-hint algorithm shows 47〜87% better performance than the TLB shootdown algorithm.
収録刊行物
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- IEICE transactions on information and systems
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IEICE transactions on information and systems 87 (7), 1682-1692, 2004-07-01
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詳細情報 詳細情報について
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- CRID
- 1572824502324523008
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- NII論文ID
- 110003214049
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- NII書誌ID
- AA10826272
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- ISSN
- 09168532
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- 本文言語コード
- en
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- データソース種別
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- CiNii Articles