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Cache Injection and High-Performance Memory-Based Synchronization Mechanisms
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- MATSUMOTO T.
- Department of Information Science, The University of Tokyo
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- Hiraki Kei
- Department of Information Science, The University of Tokyo
Bibliographic Information
- Other Title
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- キャッシュインジェクションとメモリベース同期機構の高速化
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Description
In this paper, we propose the concept of Cache Injection. Cache injection is an action of assigning data into processors' cache by an external element. To define generally, the initiator of data transmission can arbitrarily specify multiple caches as targets of the cache injection. Cache injection technique is useful for implementing various basic mechanisms used in parallel processing systems such as a light message-passing, a latency hiding/reduction by decoupled-architecture approach, an efficient macro-dataflow execution using conventional microprocessors. Then, we describe the merits of Memory-Based Synchronization mechanisms and the strategies for their performance improvements. Implementation methods of the proposed mechanisms on the D-machine (tentative name) of the Japan University Massively Parallel Processing project are described. The performance of memory-based synchronization mechanisms can be improved by the caching technique with some special treatments, and the methods are presented. Finally, application examples of cache injection and memory-based synchronization are discussed.
Journal
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- IPSJ SIG Notes
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IPSJ SIG Notes 101 113-120, 1993
Information Processing Society of Japan (IPSJ)
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Details 詳細情報について
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- CRID
- 1573105976899266176
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- NII Article ID
- 110002775206
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- NII Book ID
- AN10096105
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- Text Lang
- ja
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- Data Source
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- CiNii Articles