Cache Injection and High-Performance Memory-Based Synchronization Mechanisms

  • MATSUMOTO T.
    Department of Information Science, The University of Tokyo
  • Hiraki Kei
    Department of Information Science, The University of Tokyo

Bibliographic Information

Other Title
  • キャッシュインジェクションとメモリベース同期機構の高速化

Search this article

Description

In this paper, we propose the concept of Cache Injection. Cache injection is an action of assigning data into processors' cache by an external element. To define generally, the initiator of data transmission can arbitrarily specify multiple caches as targets of the cache injection. Cache injection technique is useful for implementing various basic mechanisms used in parallel processing systems such as a light message-passing, a latency hiding/reduction by decoupled-architecture approach, an efficient macro-dataflow execution using conventional microprocessors. Then, we describe the merits of Memory-Based Synchronization mechanisms and the strategies for their performance improvements. Implementation methods of the proposed mechanisms on the D-machine (tentative name) of the Japan University Massively Parallel Processing project are described. The performance of memory-based synchronization mechanisms can be improved by the caching technique with some special treatments, and the methods are presented. Finally, application examples of cache injection and memory-based synchronization are discussed.

Journal

  • IPSJ SIG Notes

    IPSJ SIG Notes 101 113-120, 1993

    Information Processing Society of Japan (IPSJ)

Citations (5)*help

See more

Details 詳細情報について

  • CRID
    1573105976899266176
  • NII Article ID
    110002775206
  • NII Book ID
    AN10096105
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

Report a problem

Back to top