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Co-simulation Framework for Streamlining Microprocessor Development on Standard ASIC Design Flow
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- NAKABAYASHI Tomoyuki
- Graduate School of Engineering, Mie University
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- SUGIYAMA Tomoyuki
- Graduate School of Engineering, Mie University
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- SASAKI Takahiro
- Graduate School of Engineering, Mie University
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- ROTENBERG Eric
- Department of Electrical and Computer Engineering, North Carolina State University
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- KONDO Toshio
- Graduate School of Engineering, Mie University
Search this article
Journal
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- Technical report of IEICE. VLD
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Technical report of IEICE. VLD 113 (454), 113-, 2014-02-24
The Institute of Electronics, Information and Communication Engineers
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Details 詳細情報について
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- CRID
- 1573105977674940544
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- NII Article ID
- 110009862578
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- NII Book ID
- AN10013323
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- Text Lang
- ja
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- Data Source
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- CiNii Articles