Analysis of Propagation Delay Time for Double-gate SOI-MOSFETs Based on a Scaling Theory

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Other Title
  • ダブルゲートSOI-MOSFETのスケーリング理論に基づく伝搬遅延時間の解析

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Description

Using our scaling theory we estimated propagation delay time(t_ pd>)for scaled down doublegate(DG)SOI-MOSFETs with an ideal subthreshold factor.We implemented a mobility model,which we derived to agree with experimental data for DGSOI-MOSFETs,on a mixed-level device-circuit simulator and estimated t_pd>.The estimated t_pd> values of 6.2 ps for L_G = O.1μm and 3.4 ps for 0 .05μm show that DGSOI-MOSFETs overcome the scaling limits of bulk MOSFETs and display superb device performance.

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Details 詳細情報について

  • CRID
    1573387452170332544
  • NII Article ID
    110003200353
  • NII Book ID
    AN10012954
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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