Circuit Technologies for 200MHz 16Mbit Synchronous DRAM with Block Access Mode

  • Fujiwara Atsushi
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Matsuyama Kazuhiro
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Kikukawa Hirohito
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Agata Masashi
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Iwanari Shunichi
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Fukumoto Minako
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Yamada Toshio
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.
  • Fujita Tsutomu
    Semiconductor Research Center,Matsushita Electric Industrial Co., LTD.

Bibliographic Information

Other Title
  • ブロックアクセスモード搭載200MHz16MbitシンクロナスDRAMの回路技術

Search this article

Description

200MHz 16Mbit synchronous DRAM circuit technologies are described.To achieve a 200MHz operation,we have developed a clocked N&PMOS cross-coupled read bus amplifier,a pulsed column decoder,and a quasi-static 3rd-stage amplifier.An experimental SDRAM has been fabricated using a 0.35μm CMOS process.The SDRAM ha s a block access mode for computer graphics and image processing such as MPEG.

Journal

  • Technical report of IEICE. SDM

    Technical report of IEICE. SDM 94 (406), 25-30, 1994-12-15

    The Institute of Electronics, Information and Communication Engineers

Keywords

Details 詳細情報について

  • CRID
    1573387452251010432
  • NII Article ID
    110003310318
  • NII Book ID
    AN10013254
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

Report a problem

Back to top