Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function Engineering
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- YAMAMOTO Yasue
- System LSI Technology Development Center, Corporate System LSI Development Division, Semiconductor Company, Matsushita Electric Industrial Company, Ltd.
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- HIDAKA Takeshi
- Research Institute of Electrical Communication, Tohoku University
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- NAKAMURA Hiroki
- Research Institute of Electrical Communication, Tohoku University
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- SAKURABA Hiroshi
- Research Institute of Electrical Communication, Tohoku University
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- MASUOKA Fujio
- Research Institute of Electrical Communication, Tohoku University
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説明
This paper shows that the Surrounding Gate Transistor (SGT) can be scaled down to decananometer gate lengths by using an intrinsically-doped body and gate work function engineering. Strong gate controllability is an essential characteristics of the SGT. However, by using an intrinsically-doped body, the SGT can realize a higher carrier mobility and stronger gate controllability of the silicon body. Then, in order to adjust the threshold voltage, it is necessary to adopt gate work function engineering in which a metal or metal silicide gate is used. Using a three-dimensional (3D) device simulator, we analyze the short-channel effects and current characteristics of the SGT. We compare the device characteristics of the SGT to those of the Tri-gate transistor and Double-Gate (DG) MOSFET. When the silicon pillar diameter (or silicon body thickness) is 10nm, the gate length is 20nm, and the oxide thickness is 1nm, the SGT shows a subthreshold swing of 63mV/dec and a DIBL of -17mV, whereas the Tri-gate transistor and the DG MOSFET show a subthreshold swing of 71mV/dec and 77mV/dec, respectively, and a DIBL of -47mV and -75mV, respectively. By adjusting the value of the gate work function, we define the off current at V_G=0V and V_D=1V. When the off current is set at 1pA/μm, the SGT can realize a high on current of 1020μA/μm at V_G=1V and V_D=1V. Moreover, the on current of the SGT is 21% larger than that of the Tri-gate transistor and 52% larger than that of the DG MOSFET. Therefore, the SGT can be scaled reliably toward the decananometer gate length for high-speed and low-power ULSI.
収録刊行物
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- IEICE transactions on electronics
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IEICE transactions on electronics 89 (4), 560-567, 2006-04-01
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詳細情報 詳細情報について
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- CRID
- 1573387452396573184
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- NII論文ID
- 110007503133
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- NII書誌ID
- AA10826283
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- ISSN
- 09168524
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- 本文言語コード
- en
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- データソース種別
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- CiNii Articles
