Control of current hysteresis effects in a GaAs/n-AlGaAs quantum trap FET with embedded InAs quantum dots

説明

We have studied various aspects of GaAs/n-AlGaAs heterojunctions with self-assembled QDs near the channel. In particular, we have shown that the V/sub g/ dependence of the electron concentration in the channel is varied by trapping one electron in each QD. However, although much work has been done on current hysteresis characteristics of QD-memory devices, comparatively little is known on the control of its direction by modulating the initial conditions and shape of QDs memory cell. This letter draws attention to a previously unnoticed variation of current hysteresis effects associated with the height of InAs QDs. We also show that the channel current hysteresis is only controllable by regulating the initial gate-to-source bias conditions.

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