A sheet-type scanner based on a 3D stacked organic-transistor circuit with double word-line and double bit-line structure
説明
Double word-line and bit-line structure in an organic FET-based sheet-type scanner is described. This structure reduces the line delay by a factor of 5, and the power by a factor of 7. To realize the structure in a pixel array, 3D stacked organic FETs are manufactured. The active leakage is reduced by a dynamic serially connected decoder.
収録刊行物
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- ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.
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ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. 580-582, 2005-08-30
IEEE
