Low power bank-based multi-port SRAM design due to bank standby mode
説明
A low power multi-port SRAM design method based on banks switchable between active and standby mode is described. Speed decrease is prevented by use of an access method with hidden precharge-time. More than 56% power reduction can be achieved when 64 banks are used to implement a 4-port SRAM. A 4 kB SRAM with 4 ports and 16 banks has been designed and fabricated for verification.
収録刊行物
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- The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.
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The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. 1 1_569-1_572, 2004-12-23
IEEE