Implementation of a reduced-lattice MIMO detector for OFDM Systems

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This paper presents a novel VLSI implementation of a MIMO detector for OFDM systems. The proposed architecture is able to perform both linear MMSE and reduced lattice-aided MIMO detection, making it possible to adjust the balance between performance and power consumption. In order to facilitate real-time detection in reduced lattice mode of operation, a novel fixed-complexity version of the LLL lattice reduction algorithm has been developed, allowing for strict practical timing requirements, such as those specified for new generation IEEE 802.11n wireless LAN systems, to be met. An implementation of the MIMO detector for a system employing up to 4 transmit and receive antennas is described and its complexity and performance are evaluated.

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