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Architecture of a high-speed hierarchical structure transversal filter
Description
An architecture of a high-speed linear phase finite impulse response (FIR) filter is described. This filter can provide an output equivalent to that of a higher-order FIR digital filter due to using a number of lower-order linear phase cascaded integrator comb subfilters or linear phase cascaded differential comb subfilters. It is shown that the design of the filter can be replaced with that of a simple subfilter by using a multiple mapping function. Thus, it is considered that the proposed architecture has the potential to make the design of a higher-order FIR filter easy. As an example, this filter, equivalent to a conventional linear phase FIR filter with about 11-45 filter lengths, has been designed and implemented into an LSI. The realized filter has a maximum sampling rate of 15 MHz. >
Journal
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- [Proceedings 1992] IEEE International Conference on Systems Engineering
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[Proceedings 1992] IEEE International Conference on Systems Engineering 344-347, 2003-01-02
IEEE