Low power on-chip supply voltage conversion scheme for 1G/4G bit DRAMs
説明
A new low power on-chip supply voltage conversion scheme is proposed. This scheme connects two or more DRAMs in series to make up for the large gap between the external and internal supply voltages. As large as a 50% power dissipation reduction has been successfully verified using the test system. This device is seen to be promising for voltage conversion in forthcoming gigabit DRAMs. >
収録刊行物
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- 1992 Symposium on VLSI Circuits Digest of Technical Papers
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1992 Symposium on VLSI Circuits Digest of Technical Papers 114-115, 2003-01-02
IEEE