- 【Updated on May 12, 2025】 Integration of CiNii Dissertations and CiNii Books into CiNii Research
- Trial version of CiNii Research Automatic Translation feature is available on CiNii Labs
- Suspension and deletion of data provided by Nikkei BP
- Regarding the recording of “Research Data” and “Evidence Data”
12 Gbps GaAs 2-bit multiplexer/demultiplexer chip set for the SONET STS-192 system
Description
Ultra-high-speed 2-b multiplexer (MUX) and demultiplexer (DEMUX) ICs have been developed for next-generation optical fiber communication systems in the SONET (synchronous optical network), which will require data bit rates of about 10 Gb/s. The ICs were fabricated using a 0.5- mu m WN/sub x/-gate process and were operated up to 12 Gb/s by adopting a tree-type architecture with a large phase margin and a new on-chip transmission line called the ladder grounded coplanar line. These ICs are applicable to future optical fiber communication systems (STS-192) as key devices. >
Journal
-
- 11th Annual Gallium Arsenide Integrated Circuit (GaAs IC) Symposium
-
11th Annual Gallium Arsenide Integrated Circuit (GaAs IC) Symposium 317-320, 2003-01-13
IEEE
