Programmable design for memory sharing processor array
説明
Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and high-cost performance. MSPA design methodology has been developed with regular structure and systematic procedure. In this paper, programmable MSPA is proposed. It embeds not only MSPA architecture, but design procedure into silicon chips so that various applications can be performed with high speed.
収録刊行物
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- Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97
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Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97 3 2048-2051, 2002-11-22
IEEE