- 【Updated on May 12, 2025】 Integration of CiNii Dissertations and CiNii Books into CiNii Research
- Trial version of CiNii Research Automatic Translation feature is available on CiNii Labs
- Suspension and deletion of data provided by Nikkei BP
- Regarding the recording of “Research Data” and “Evidence Data”
Design of 10 GHz CMOS Optoelectronic Receiver Analog Front-End in Low-Cost 0.18 µm CMOS Technology
Description
This paper presents an analog front-end circuit for an optical receiver, which consists of a trans-impedance amplifier (TIA), a limiting amplifier (LA) and an output buffer fabricated in a low-cost 0.18 µm CMOS technology. The introduced TIA uses a floating active inductor (FAI) based on gyrator-C structure, which is why it can increase the bandwidth while occupying a smaller chip area. The proposed transimpedance amplifier achieves a transimpedance gain of 41 dBΩ and −3 dB frequency of 10 GHz with 0.1 pF total input capacitance. In addition, the TIA with the post limiting amplifier increases the gain to over 70 dBΩ and the bandwidth is still above 10 GHz.
Journal
-
- 2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)
-
2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS) 1-2, 2019-12-01
IEEE
