Time-Domain Multi-bit Delta\Sigma Analog-to-Digital Converter
説明
A multi-bit representation in the time domain has been applied to a Delta\Sigma analog-to-digital converter (ADC), which consists of an asynchronous Delta\Sigma modulator (ADSM) and a time-to-digital converter (TDC). Current-mode circuits are included in the ADSM to suppress the variation in the node voltage. The TDC is based on a ring oscillator-based TDC comprised of four stages of differential delay element followed by a counter and a phase detector. The 1st-order noise-shaping was experimentally obtained for the TDC fabricated by using 0.18-µ m standard CMOS technology. A successful operation of the ADC has been obtained by transistor-level circuit simulation.
収録刊行物
-
- 2011 41st IEEE International Symposium on Multiple-Valued Logic
-
2011 41st IEEE International Symposium on Multiple-Valued Logic 254-258, 2011-05-01
IEEE
