High-speed and wide-tuning-range LC frequency dividers
説明
Wide tuning-range frequency dividers based on an LC resonator are proposed for high-speed transceivers. The proposed circuit is fabricated using a two-metal and 0.5-/spl mu/m-gate CMOS process and realizes minimum and the maximum frequencies of 7.74 GHz and 8.16 GHz, respectively, with a power consumption of 2.2 mW at a supply voltage of 0.9 V. To enlarge a tuning range without increasing power consumption, the LC divider with MOS varactors is also fabricated using the same process, where the minimum and the maximum frequencies are 1.49 GHz and 1.97 GHz, respectively, with a power consumption of 0.87 mW at a supply voltage of 1.2 V. Finally, application to a phase-locked loop of the proposed circuit is described.
収録刊行物
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- 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
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2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) IV-361, 2004-09-28
IEEE